1. Field of the Invention
The present invention relates to a semiconductor device, and particularly to a semiconductor device equipped with a penetrating electrode which is so provided as to pass through a semiconductor chip.
2. Description of Related Art
Storage capacity required for semiconductor memory devices such as DRAM (Dynamic Random Access Memory) has been growing year by year. To satisfy the requirement, in recent years, a memory device called multi-chip package has been proposed. In the multi-chip package, a plurality of memory chips are stacked. However, in the case of the multi-chip package, wires that connect each memory chip and a package substrate are necessary. Therefore, it is difficult to stack many memory chips.
On the other hand, in recent years, a semiconductor device of a type in which a plurality of memory chips with penetrating electrodes are stacked has been proposed. In the semiconductor device of the type, among penetrating electrodes provided on each memory chip, the penetrating electrodes that are provided on the same plane position when seen from a stacking direction are electrically short-circuited. Therefore, even if the number of chips stacked increases, the number of electrodes connected to the package substrate does not increase. Thus, it is possible to stack a larger number of memory chips.
When the semiconductor chips with penetrating electrodes are stacked, bump electrodes provided on upper and lower chips need to be in accurate contact with each other. Therefore, the chips are stacked as positioning is performed by referencing alignment marks provided on the upper and lower chips. There is disclosed in Japanese Patent Application Laid-Open No. 2005-217071 is a semiconductor device that uses penetrating electrodes as alignment marks.
However, the alignment marks disclosed in Japanese Patent Application Laid-Open No. 2005-217071 have a different planar shape from original penetrating electrodes that are used for transmitting and receiving of signals, power supply, or the like, such as a cross shape or L-shape. A process of forming the penetrating electrodes is controlled in such a way as to most accurately form original penetrating electrodes. Accordingly, if making of alignment marks of a different shape from the original penetrating electrodes is performed in the same process as that of the original penetrating electrodes as disclosed in Japanese Patent Application Laid-Open No. 2005-217071, the alignment marks might not be accurately formed.
If the accuracy of the alignment marks is low, there are great difficulties in stacking the chips. The alignment marks are recognized by a recognition camera provided on a flip chip bonder. However, the devices that are now available in the market require a dimensional accuracy of 1 μm or less for alignment marks to enable the recognition camera to accurately recognize the positions. On the other hand, the film thickness of photoresist used for formation of penetrating electrodes needs to be about 20 μm. As a result, an edge of the photoresist becomes tapered. If different planar shapes of the penetrating electrodes, such as a cross shape or L-shape, are used, distortion of the shape or the like is likely to occur, making it difficult to realize a dimensional accuracy of 1 μm or less.